This invention relates to means for enhancing the speed of transfer of information from one source to another and specifically for capacitance reduction circuit means which is coupled to a data bus that connects a transmitter and receiver or two transceivers.
Many of today's electronics systems use MOS circuitry which selectively has to drive a relatively high capacitance line (bus). One avenue to try and enhance response time is to increase the physical size of all the MOS drive devices so as to increase the drive capability by lowering the resistance. This also increases the capacitance on the bus which degrades response time. A point is reached at which increasing the size of the MOS driver devices proportionally increases the capacitance on the bus such that there is little or no enhancement of response time.
It is desirable in many instances to enhance the response time between various interconnected MOS circuits beyond what improvement can be achieved by increasing the physical size of the MOS driver devices.